A breakthrough in 3D chip technology has revolutionized high-performance computing systems. This advancement involves a vertically stacked architecture, placing processing units directly above dynamic random access memory (DRAM) stacks. The development is supported by innovations in high-speed bonding and advanced adhesive technologies, aiming to meet the increasing demands of high-performance computing, such as high memory bandwidth, low power consumption, and minimal power supply noise.
From televisions to smartwatches, semiconductors have driven progress in electronics for years. However, with the rise of artificial intelligence and compute-intensive applications, existing chip solutions struggle to deliver the required speed and energy efficiency. Traditional system-in-package (SiP) designs face limitations in scaling and performance. To address these challenges, researchers at the Institute of Science Tokyo introduced a new concept called BBCube™, focusing on 2.5D/3D integration.
At the 2025 IEEE 75th Electronic Components and Technology Conference, the team led by Professors Norio Chujo and Takayuki Ohba showcased three key technologies to support the BBCube™ concept. They began by addressing solder interconnect constraints with a face-down chip-on-wafer (COW) process, utilizing inkjet printing and selective adhesive coating for precise bonding of chips onto a 300 mm waffle wafer.
Over 30,000 chips of various sizes were successfully fabricated onto the waffle wafer, achieving enhanced bonding speed without chip-detachment failures. To ensure thermal stability in stacking ultra-thin wafers, the team developed a novel adhesive, DPAS300, with an organic–inorganic hybrid composition, showcasing excellent adhesion and thermal resistance.
Further advancements included a 3D xPU-on-DRAM architecture with a new power distribution framework. This involved embedding capacitors between logic and memory layers, redistributing electrical paths across the wafer, and inserting through-silicon vias (TSVs) in wafer lanes and DRAM scribe lines. These innovations significantly reduced energy consumption for data transmission and suppressed power supply noise.
The Institute of Science Tokyo’s research represents a significant leap in chip integration for next-generation computing systems. This breakthrough technology is poised to enhance the efficiency and performance of high-performance computing systems, catering to the evolving needs of various industries.
As the global semiconductor market evolves, the demand for chip technology continues to drive innovation. However, chip shortages pose challenges that may impact the industry in the foreseeable future. The emergence of graphene-based batteries and solid-state batteries is reshaping energy storage solutions, offering improved performance and efficiency.
Moreover, the Internet of Things (IoT) is playing a crucial role in the electric vehicle industry, enabling connectivity and data exchange for enhanced efficiency and functionality. These technological advancements underscore the importance of continuous research and development in the field of computer technology to meet the demands of a rapidly evolving digital landscape.
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